By Janusz Rajski

ISBN-10: 3540404481

ISBN-13: 9783540404484

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Additional resources for Arithmetic Built-In Self-Test for Embedded Systems

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As the register T is used only at the beginning of testing, it is further modified to act as a signature analyzer, thus making the controller self-testable. During execu­ tion, several signals are fed into T which compacts them into a signature. This signature, which is subsequently scanned out altogether with other test results, allows the integrity of the controller itself to be determined.

A k - 1 is obtained. Let the polynomial be of the form h(x) = x3 + x2 + 1. If the LFSR is to generate a test cube {xxlx0lx}, where x denotes a "don't care" condition, then a corresponding seed can be determined by solving the following system of equations: a0 a1 = = x x 26 1. Built-in Self-Test a2 a0 + a2 a0 + a1 + a2 a0 + a1 a1 + a2 = = = = 1 x 0 1 = x. It can be easily verified that the resulting seed is will subsequently produce a test pattern 0111010. (a2,a1,a0) = (1,1,0), which A comprehensive analysis of this scheme, as well as a new reseeding scenario based on Multiple-Polynomial (MP) LFSRs, has been provided in [78].

Deterministic patterns are generated by loading the LFSR with an 5-bit seed (s < k) and applying enough cycles to fill the scan chain. The seed specifies the first s positions of the LFSR, while the other k — s positions are assumed to be reset. Hence, loading the seed can be performed by resetting the LFSR and shifting the s-bit seed serially, starting with its least significant bit. 3. 11: Decompressor hardware. for each pattern, and can be overwritten between the applications of patterns. Consequently, the LFSR can be implemented by using scan flip-flops.

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Arithmetic Built-In Self-Test for Embedded Systems by Janusz Rajski


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